Little Bit of History
How it all started
Verilog was started initially as a proprietory hardware modeling
language by Gateway Design Automation Inc. around 1984. It is rumored
that the original language was designed by taking features from the most
popular HDL language of the time, called HiLo as well as from traditional
computer language such as C. At that time, Verilog was not standardized
and the language modified itself in almost all the revisions that came
out within 1984 to 1990.
But very soon, the designers of the language realized the need
of integrating an API into the language. According to Yatin Trivedi, one of the foremost
players in shaping the language, the need of an API came out first with
the realization that it was impossible to simulate an entire system with
the resources available those days with an interpretive language such as
Verilog. So, PLI was born.
Initial days of PLI
Since, it was a proprietary language, Verilog was not standardized.
With almost every release of the Gateway's product, some features or others from
the previous version of Verilog were either removed or modified.
The story of PLI was not any different either. The functions
(only tf initially, then acc) were in constant state of
modifications and, as somebody involved in the design of the language said
later, it was a mess.
Gateway was acquired by Cadence
The time was late 1990. Cadence
Design System, whose primary product at that time included Thin film
process simulator, decided to acquire Gateway Automation System.
Along with other Gateway product, Cadence now became the owner of
the Verilog language and its PLI mechanism as well.
Verilog went public
In 1990, Cadence did something, which, according to Joe Costello,
the then CEO of Cadence, was termed as "suicidal attempt" by many
- he made Verilog and its PLI mechanism a public domain property.
This meant anybody could develop a Verilog simulator and could become a
potential competitor of Cadence.
Open Verilog International was born
Soon it was realized, that if there were too many companies in the market
for Verilog, potentially everybody would like to do what Gateway did so
far - changing the language for their own benefit. This would defeat the
main purpose of releasing the language to public domain. As a result Open
Verilog International (OVI) was formed with representatives from all
major hardware tool vendors of the time.
The primary task given to OVI was to standardize Verilog and PLI.
Two separate task forces looked into the Verilog language and the PLI part.
The first drafts of the standards in both the cases were almost
an exact replica of the Cadence's Verilog manual.
IEEE Std. 1364-1995
In the meantime, the popularity of Verilog and PLI was rising exponentially.
Verilog as a HDL found more admirers than well-formed and federally funded
VHDL. It was only a matter of time before people in OVI realized
the need of a more universally accepted standard. Accordingly, the board
of directors of OVI requested IEEE to form a working committee for
establishing Verilog as an IEEE standard. The working committee 1364 was
formed in mid 1993 and on October 14, 1993, it had its first meeting.
The standard, which combined both the Verilog language syntax
and the PLI in a single volume, was passed in May 1995 and now known as
IEEE Std. 1364-1995.
IEEE Std. 1364-2001
Around 1998, IEEE Std. Committee 1364 took the task of revising
the standard. Initially expected in 1999, the standard eventually
came out in 2001. Its official name was IEEE Std. 1364-2001, but
it became more popular as v2k. V2k did not add any major
item in terms of PLI. A strategic decision was made to make future
changes/additions in the VPI section of the PLI. While this reduced
the amount of work for the EDA companies requiring them to maintain
only one revision of Verilog PLI, many existing applications are
still in PLI 1.0 and if you are the owner of any such application,
you should not be happy with this decision.
The SystemVerilog Saga
By 2001-2002, many new innovations came up in the field of HDLs.
One interesting development came from (now defunct) Co-design
Automation . It extended Verilog to form its proprietory
language Superlog to include popular C-like data structures
(such as, structures and unions), enumerated data types and a
whole lot of other useful features.
From the perspective of PLI, Co-design dazzled everybody by
introducing what it called C-Blend. C-Blend allowed direct
embedding of C code inside Verilog and facility of calling functions
of one language (say, C) from another language (Verilog, for example).
This completely eliminated the need for a traditional PLI mechanism.
Around the same time, Synopsys developed somewhat similar DirectC.
Co-design was later purchased by Synopsys. By that time, many of
Superlog's features were donated to Accellera's new language
development activity - termed as SystemVerilog .
rapidly changed the landscape of HDLs. In quick succession, it
introduced two major and one minor revisions. Many of C-Blend
and DirectC's features are today part of SystemVerilog's
Direct Programming Interface (DPI).